#ifndef S_QSPI_DRV_H
#define S_QSPI_DRV_H

#include <linux/module.h>

/********** defines ***************/
#define MAX_RETRY_CNT			(1000U)
#define READ_TOP_DUMMY_CYCLE	(5U) //dummy cycles when we read chip top exclude 1k buffers.
#define READ_1K_DUMMY_CYCLE		(1U) //dummy cycles when we read 1k buffer from the chip top.
#define TOP_ADDR_RANGE			(0x0E000000U) //TOP level address : hd_addr[27:25]='b111 
#define BUF_1K_ADDR_RANGE		(TOP_ADDR_RANGE+0x40) //1K buffer address(top base + 0 to top base + 0x40), we need READ_NODE_DUMMY_CYCLE when read this address.
#define DEV_NUM 				(1U)
#define DEVICE_NAME 			"s_qspi_drv"

/******* ioctl CMD ***************/

#define CMD_SET_ECC_ENABLE 		(0x60)
#define CMD_GET_FIFO_STAT 		(0x61)    //get fifo state to judge if empty .
#define CMD_WRITE_DATA 			(0x62)
#define CMD_READ_DATA 			(0x63)
#define CMD_WRITE_FIFO_0		(0x64)
#define CMD_WRITE_FIFO_1		(0x65)

/************ structs **************/
typedef struct reg_4_each_spi_dev{
	volatile int remap_flag; //0: this dev has not been remaped.  1:this dev has been remaped.
	volatile int ecc_enable;

	volatile void __iomem *tx_fifo_0_addr_reg;
	volatile void __iomem *tx_fifo_0_ctl_reg;
	volatile void __iomem *tx_fifo_0_stat_reg;
	volatile void __iomem *tx_fifo_0_data_reg[32];
 
	volatile void __iomem *tx_fifo_1_addr_reg;
	volatile void __iomem *tx_fifo_1_ctl_reg;
	volatile void __iomem *tx_fifo_1_stat_reg;
	volatile void __iomem *tx_fifo_1_data_reg[32];

	volatile void __iomem *rx_addr_reg;
	volatile void __iomem *rx_ctl_reg;
	volatile void __iomem *rx_stat_reg;
	volatile void __iomem *rx_ecc_addr_reg;
	volatile void __iomem *rx_ecc_info_reg;
	volatile void __iomem *rx_ecc_cnt_reg;
	volatile void __iomem *rx_data_reg[32];

	volatile void __iomem *qspi_int_status_reg;
	volatile void __iomem *qspi_int_mask_reg;
	volatile void __iomem *qspi_int_clear_reg;

	volatile int ev_occured; 	// wait event , 0 : wait, others: event occured.
	wait_queue_head_t dev_wait_queue; //wait queue head.

}S_QSPI_INFO_st;

typedef struct msg {
    int addr;
	int clr_2bit_ecc; //only available in read cmd.
	int clr_1bit_ecc_cnt; //only available in read cmd.
    int retry_limit; //retry times when ECC error detected.
	char *p_data;
    int data_len;
}MSG_st;

#endif

